Zilog Z16C30 Manuel d'utilisateur télécharger pdf (Page 91)

5-24

Z16C30 USC

®

USER'S MANUAL

UM97USC0100

ZILOG

5.16 CYCLIC REDUNDANCY CHECKING (Continued)

RxFIFO

Data In

Flag/Abort

Detect Logic,

Incl. Shift Register

SO

SI

(RxLength)-bit

Shift Register

SO

SI

(RxLength)-bit

Shift Register

PO

SI SO

M

U

X

Rx CRC

Generator

Err

SI

M

U

X

Used in HDLC/SDLC

and 802.3 Modes

Used in all

other Sync modes

RxD

Used in HDLC/

SDLC Mode

Figure 5-9. A Model of the Receive Datapath

UM009402-0201

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