Zilog Z80195 Manuel d'utilisateur télécharger pdf (Page 41)

4-5

Z80185/195 DEVELOPMENT KIT

USER'S MANUAL

UM951800100

ZILOG

Other Jumpering

The following modem control signals can be interconnected with PIA16-10 I/Os on the Z80185/195

or INT0-2 inputs on the Z80185/195 and the HOSTHI and PERIPHI lines of J3 and J4, using the J14

jumper block as follows.

Jumper Numbers Description

J14 1 INT0

J14 2 INT1

J14 3 HOSTHI (J4)

J14 4 PIA16

J14 5 INT2

J14 6 PERIPHI (J3, J4)

J14 7 PIA15

J14 8 ESCC DxR in

J14 9 PIA14

J14 10 ESCC DCD out

J14 11 PIA13

J14 12 ASCI0 DxR out

J14 13 PIA12

J14 14 ASCI0 DxR in

J14 15 PIA11

J14 16 ASCI0 DCD out

J14 17 PIA10

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Zilog Z80195 Manuel d'utilisateur Page 41