Zilog Z08470 Manuel d'utilisateur télécharger pdf (Page 57)

100

101

UM008007-0715 Block Transfer and Search

Z80 CPU

User Manual

In all extended immediate or extended addressing modes, the low-order byte always

appears first after the op code.

Table 7 lists the 16-bit exchange instructions implemented in the Z80 CPU. Op code

08h

allows the programmer to switch between the two pairs of Accumulator flag registers,

while

D9h allows the programmer to switch between the duplicate set of six general-pur-

pose registers. These op codes are only one byte in length to minimize the time necessary

to perform the exchange so that the duplicate banks can be used to make fast interrupt

response times.

Block Transfer and Search

Table 8 lists the extremely powerful block transfer instructions. These instructions operate

with three registers.

• HL points to the source location

• DE points to the destination location

• BC is a byte counter

Figure 37. Example of a 2-Byte Load Indexed/Immediate Instruction Sequence

Table 7. Exchanges EX and EXX

Implied Addressing

AF'

BC', DE',

and HL' HL IX IY

Implied

AF 08

DE D9

DE EB

Indirect

(SP) E3

Address A

A+1

Op Code

Operand

1 2 ... 52 53 54 55 56 57 58 59 60 61 62 ... 325 326

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Zilog Z08470 Manuel d'utilisateur Page 57

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