DC-8297-03PREFACEThank you for your interest in the Z380™ Central Processing Unit (CPU) and itsassociated family of products. This Technical Manual de
2-2Z380™USER'S MANUALDC-8297-03ZILOG2.2 CPU REGISTER SPACE (Continued)AFBCDEHLIXU IXLIYU IYLA' F'B' C'D' E'H'
5-66Z380™USER'S MANUALDC-8297-03ZILOGININPUT ACCUMULATORIN A,(n)Operation: A ← (n)The byte of data from the selected peripheral is loaded into th
5-67Z380™USER'S MANUALZILOGDC-8297-03IN0INPUT (FROM PAGE 0)IN0 dst,(n) dst = ROperation: dst ← (n)The byte of data from the selected on-chip peri
5-68Z380™USER'S MANUALDC-8297-03ZILOGINAINPUT DIRECT FROM PORT ADDRESS (BYTE)INA A,(nn)Operation: A ← (nn)The byte of data from the selected peri
5-69Z380™USER'S MANUALZILOGDC-8297-03INAWINPUT DIRECT FROM PORT ADDRESS (WORD)INAW HL,(nn)Operation: HL(15-0) ← (nn)The word of data from the sel
5-70Z380™USER'S MANUALDC-8297-03ZILOGINCINCREMENT (BYTE)INC dstdst = R, RX, IR, XOperation: dst ← dst + 1The destination operand is incremented b
5-71Z380™USER'S MANUALZILOGDC-8297-03INC[W]INCREMENT (WORD)INC[W] dst dst = R, RXOperation: if (XM) then begindst(31-0) < dst(31-0) + 1endelse
5-72Z380™USER'S MANUALDC-8297-03ZILOGINDINPUT AND DECREMENT (BYTE)INDOperation: (HL) ← (C)B ← B – 1HL ← HL – 1This instruction is used for block
5-73Z380™USER'S MANUALZILOGDC-8297-03INDWINPUT AND DECREMENT (WORD)INDWOperation: (HL) ← (DE)BC(15-0) ← BC(15-0) – 1HL ← HL – 2This instruction i
5-74Z380™USER'S MANUALDC-8297-03ZILOGINDRINPUT, DECREMENT AND REPEAT (BYTE)INDROperation: repeat until (B=0) begin(HL) ← (C)B ← B – 1HL ← HL – 1e
5-75Z380™USER'S MANUALZILOGDC-8297-03INDRWINPUT, DECREMENT AND REPEAT (WORD)INDRWOperation: repeat until (BC=0) begin(HL) ← (DE)BC(15-0) ← BC(15-
2-3Z380™USER'S MANUALZILOGDC-8297-032.2.1 Primary and Working RegistersThe working register set is divided into two register files:the primary fi
5-76Z380™USER'S MANUALDC-8297-03ZILOGINIINPUT AND INCREMENT (BYTE)INIOperation: (HL) ← (C)B ← B – 1HL ← HL + 1This instruction is used for block
5-77Z380™USER'S MANUALZILOGDC-8297-03INIWINPUT AND INCREMENT (WORD)INIWOperation: (HL) ← (DE)BC(15-0) ← BC(15-0) – 1HL ← HL + 2This instruction i
5-78Z380™USER'S MANUALDC-8297-03ZILOGINIRINPUT, INCREMENT AND REPEAT (BYTE)INIROperation: repeat until (B=0) begin(HL) ← (C)B ← B – 1HL ← HL + 1e
5-79Z380™USER'S MANUALZILOGDC-8297-03INIRWINPUT, INCREMENT AND REPEAT (WORD)INIRWOperation: repeat until (BC=0) begin(HL) ← (DE)BC(15-0) ← BC(15-
5-80Z380™USER'S MANUALDC-8297-03ZILOGJPJUMPJP [cc,]dst dst = IR, DAOperation: if (cc is TRUE) then beginif (XM) then beginPC(31-0) ← dst(31-0)end
5-81Z380™USER'S MANUALZILOGDC-8297-03JRJUMP RELATIVEJR [cc,]dst dst = RAOperation: if (cc is TRUE) then begindst ← SIGN EXTEND dstif (XM) then be
5-82Z380™USER'S MANUALDC-8297-03ZILOGLDLOAD ACCUMULATORLD dst,src dst = Asrc = R, RX, IM, IR, DA, Xordst = R, RX, IR, DA, Xsrc = AOperation: dst
5-83Z380™USER'S MANUALZILOGDC-8297-03LDLOAD IMMEDIATE (BYTE)LD dst,n dst = R, RX, IR, XOperation: dst ← nThe byte of immediate data is loaded int
5-84Z380™USER'S MANUALDC-8297-03ZILOGLDLOAD IMMEDIATE (WORD)LD dst,nn dst = R, RXOperation: if (LW) then begindst(31-0) ← nnendelse begindst(15-0
5-85Z380™USER'S MANUALZILOGDC-8297-03LDWLOAD IMMEDIATE (WORD)LDW dst,nn dst = IROperation: if (LW) then begindst(31-0) ← nnendelse begindst(15-0)
2-4Z380™USER'S MANUALDC-8297-03ZILOG2.2.6 Stack Pointer (Continued)Increment/decrement of the Stack Pointer is affected bymodes of operation (Nat
5-86Z380™USER'S MANUALDC-8297-03ZILOGLDLOAD REGISTER (BYTE)LD dst,src dst = Rsrc = R, RX, IM, IR, Xordst = R, RX, IR, Xsrc = ROperation: dst ← sr
5-87Z380™USER'S MANUALZILOGDC-8297-03LD[W]LOAD REGISTER (WORD)LD[W] dst,src dst = Rsrc = R, RX, IR, DA, X, SRordst = R, RX, IR, DA, X, SRsrc = RO
5-88Z380™USER'S MANUALDC-8297-03ZILOGLD[W]LOAD REGISTER (WORD)Load from RegisterAddressing ExecuteMode Syntax Instruction Format Time NoteRX: LD
5-89Z380™USER'S MANUALZILOGDC-8297-03LDLOAD STACK POINTERLD dst,src dst = SPsrc = R, RX, IM, DAordst = DAsrc = SPOperation: if (LW) then begindst
5-90Z380™USER'S MANUALDC-8297-03ZILOGLDLOAD FROM I OR R REGISTER (BYTE)LD dst,src dst = Asrc = I, ROperation: dst ← srcThe contents of the source
5-91Z380™USER'S MANUALZILOGDC-8297-03LDLOAD INTO I OR R REGISTER (BYTE)LD dst,src dst = I, Rsrc = AOperation: dst ← srcThe contents of the accumu
5-92Z380™USER'S MANUALDC-8297-03ZILOGLD[W]LOAD I REGISTER (WORD)LD[W] dst,src dst = HLsrc = I ORdst = Isrc = HLOperation: if (LW) then begindst
5-93Z380™USER'S MANUALZILOGDC-8297-03LDCTLLOAD CONTROL REGISTER (BYTE)LDCTL dst,src dst = DSR, XSR, YSRsrc = A, IMordst = Asrc = DSR, XSR, YSRord
5-94Z380™USER'S MANUALDC-8297-03ZILOGLDCTLLOAD FROM CONTROL REGISTER (WORD)LDCTL dst,src dst = HLsrc = SROperation: if (LW) then begindst(31-0) ←
5-95Z380™USER'S MANUALZILOGDC-8297-03LDCTLLOAD INTO CONTROL REGISTER (WORD)LDCTL dst,src dst = SRsrc = HLOperation: if (LW) then begindst(31-16)
2-5Z380™USER'S MANUALZILOGDC-8297-0376543210Bits within a byte:16-bit word at address n:Least Significant ByteMost Significant ByteAddress nAddre
5-96Z380™USER'S MANUALDC-8297-03ZILOGLDDLOAD AND DECREMENT (BYTE)LDDOperation: (DE) ← (HL)DE ← DE – 1HL ← HL – 1BC(15-0) ← BC(15-0) – 1This instr
5-97Z380™USER'S MANUALZILOGDC-8297-03LDDWLOAD AND DECREMENT (WORD)LDDWOperation: if (LW) then begin(DE) ← (HL)(DE+1) ← (HL+1)(DE+2) ← (HL+2)(DE+3
5-98Z380™USER'S MANUALDC-8297-03ZILOGLDDRLOAD, DECREMENT AND REPEAT (BYTE)LDDROperation: repeat until BC=0 begin(DE) ← (HL)DE ← DE – 1HL ← HL – 1
5-99Z380™USER'S MANUALZILOGDC-8297-03LDDRWLOAD, DECREMENT AND REPEAT (WORD)LDDRWOperation: repeat until (BC=0) beginif (LW) then begin(DE) ← (HL)
5-100Z380™USER'S MANUALDC-8297-03ZILOGLDILOAD AND INCREMENT (BYTE)LDIOperation: (DE) ← (HL)DE ← DE + 1HL ← HL + 1BC(15-0) ← BC(15-0) – 1This inst
5-101Z380™USER'S MANUALZILOGDC-8297-03LDIWLOAD AND INCREMENT (WORD)LDIWOperation: if (LW) then begin(DE) ← (HL)(DE+1) ← (HL+1)(DE+2) ← (HL+2)(DE+
5-102Z380™USER'S MANUALDC-8297-03ZILOGLDIRLOAD, INCREMENT AND REPEAT (BYTE)LDIROperation: repeat until (BC=0) begin(DE) ← (HL)DE ← DE + 1HL ← HL
5-103Z380™USER'S MANUALZILOGDC-8297-03LDIRWLOAD, INCREMENT AND REPEAT (WORD)LDIRWOperation: repeat until (BC=0) beginif (LW) then begin(DE) ← (HL
5-104Z380™USER'S MANUALDC-8297-03ZILOGMLTMULTIPLY UNSIGNED (BYTE)MLT R src = ROperation: R(15-0) ← R(7-0) x R(15-8)The contents of the upper byte
5-105Z380™USER'S MANUALZILOGDC-8297-03MTESTMODE TESTMTESTOperation: S ← SR(7)Z ← SR(6)C ← SR(1)The three mode control bits in the Select Register
2-6Z380™USER'S MANUALDC-8297-03ZILOG2.5. EXTERNAL I/O ADDRESS SPACEExternal I/O address space is 4 Gbytes in size and ExternalI/O addresses are g
5-106Z380™USER'S MANUALDC-8297-03ZILOGMULTWMULTIPLY (WORD)MULTW [HL,]src src = R, RX, IM, XOperation: HL(31-0) ← HL(15-0) x src(15-0)The contents
5-107Z380™USER'S MANUALZILOGDC-8297-03MULTUWMULTIPLY UNSIGNED (WORD)MULTUW [HL,]src src = R, RX, IM, XOperation: HL(31-0) ← HL(15-0) x src(15-0)T
5-108Z380™USER'S MANUALDC-8297-03ZILOGNEGNEGATE ACCUMULATORNEG [A]Operation: A ← -AThe contents of the accumulator are negated, that is replaced
5-109Z380™USER'S MANUALZILOGDC-8297-03NEGWNEGATE HL REGISTER (WORD)NEGW [HL]Operation: HL(15-0) ← -HL(15-0)The contents of the HL register are ne
5-110Z380™USER'S MANUALDC-8297-03ZILOGNOPNO OPERATIONNOPOperation: NoneNo operation.Flags: S: UnaffectedZ: UnaffectedH: UnaffectedV: UnaffectedN:
5-111Z380™USER'S MANUALZILOGDC-8297-03OROR (BYTE)OR [A,]src src = R, RX, IM, IR, XOperation: A ← A OR srcA logical OR operation is performed betw
5-112Z380™USER'S MANUALDC-8297-03ZILOGORWOR (WORD)ORW [HL,]src src = R, RX, IM, XOperation: HL(15-0) ← HL(15-0) OR src(15-0)A logical OR operatio
5-113Z380™USER'S MANUALZILOGDC-8297-03OTDMOUTPUT DECREMENT MEMORYOTDMOperation: (C) ← (HL)C ← C – 1B ← B – 1HL ← HL – 1This instruction is used f
5-114Z380™USER'S MANUALDC-8297-03ZILOGOTDMROUTPUT, DECREMENT MEMORY REPEATOTDMROperation: repeat until (B=0) begin(C) ← (HL)C ← C – 1B ← B – 1HL
5-115Z380™USER'S MANUALZILOGDC-8297-03OTDROUTPUT, DECREMENT AND REPEAT (BYTE)OTDROperation: repeat until (B=0) beginB ← B – 1(C) ← (HL)HL ← HL –
2-7Z380™USER'S MANUALZILOGDC-8297-03Zilog’s products are not authorized for use as critical compo-nents in life support devices or systems unless
5-116Z380™USER'S MANUALDC-8297-03ZILOGOTDRWOUTPUT, DECREMENT AND REPEAT (WORD)OTDRWOperation: repeat until (BC=0) beginBC(15-0) ← BC(15-0) – 1(DE
5-117Z380™USER'S MANUALZILOGDC-8297-03OTIMOUTPUT INCREMENT MEMORYOTIMOperation: (C) ← (HL)C ← C + 1B ← B – 1HL ← HL + 1This instruction is used f
5-118Z380™USER'S MANUALDC-8297-03ZILOGOTIMROUTPUT, INCREMENT MEMORY REPEATOTIMROperation: repeat until (B=0) begin(C) ← (HL)C ← C + 1B ← B – 1HL
5-119Z380™USER'S MANUALZILOGDC-8297-03OTIROUTPUT, INCREMENT AND REPEAT (BYTE)OTIROperation: repeat until (B=0) beginB ← B – 1(C) ← (HL)HL ← HL +
5-120Z380™USER'S MANUALDC-8297-03ZILOGOTIRWOUTPUT, INCREMENT AND REPEAT (WORD)OTIRWOperation: repeat until (BC=0) beginBC(15-0) ← BC(15-0) – 1(DE
5-121Z380™USER'S MANUALZILOGDC-8297-03OUTOUTPUT (BYTE)OUT (C),src src = R, IMOperation: (C) ← srcThe byte of data from the source is loaded into
5-122Z380™USER'S MANUALDC-8297-03ZILOGOUTWOUTPUT (WORD)OUTW (C),src src = R, IMOperation: (C) ← src(15-0)The word of data from the source is load
5-123Z380™USER'S MANUALZILOGDC-8297-03OUTOUTPUT ACCUMULATOROUT (n),AOperation: (n) ← AThe byte of data from the accumulator is loaded into the se
5-124Z380™USER'S MANUALDC-8297-03ZILOGOUT0OUTPUT (TO PAGE 0)OUT0 (n),src src = ROperation: (n) ← srcThe byte of data from the source register is
5-125Z380™USER'S MANUALZILOGDC-8297-03OUTAOUTPUT DIRECT TO PORT ADDRESS (BYTE)OUT (nn),AOperation: (nn) ← AThe byte of data from the accumulator
2-1Z380™USER'S MANUALZILOGDC-8297-032.1 INTRODUCTIONUSER’s MANUALCHAPTER 2ADDRESS SPACESThe Z380 CPU supports five address spaces correspond-ing
5-126Z380™USER'S MANUALDC-8297-03ZILOGOUTAWOUTPUT DIRECT TO PORT ADDRESS (WORD)OUT (nn),HLOperation: (nn)← HL(15-0)The word of data from the HL r
5-127Z380™USER'S MANUALZILOGDC-8297-03OUTDOUTPUT AND DECREMENT (BYTE)OUTDOperation: B ← B - 1(C) ← (HL)HL ← HL - 1This instruction is used for bl
5-128Z380™USER'S MANUALDC-8297-03ZILOGOUTDWOUTPUT AND DECREMENT (WORD)OUTDWOperation: BC(15-0) ← BC(15-0) - 1(DE) ← (HL)HL ← HL - 2This instructi
5-129Z380™USER'S MANUALZILOGDC-8297-03OUTIOUTPUT AND INCREMENT (BYTE)OUTIOperation: B ← B - 1(C) ← (HL)HL ← HL + 1This instruction is used for bl
5-130Z380™USER'S MANUALDC-8297-03ZILOGOUTIWOUTPUT AND INCREMENT (WORD)OUTIWOperation: BC(15-0) ← BC(15-0) –1(DE) ← (HL)HL ← HL + 2This instructio
5-131Z380™USER'S MANUALZILOGDC-8297-03POPPOP ACCUMULATORPOP dst dst = AFOperation: F ← (SP)A ← (SP+1)SP ← SP + 2if (LW) then beginSP ← SP + 2endT
5-132Z380™USER'S MANUALDC-8297-03ZILOGPOPPOP CONTROL REGISTERPOP dst dst = SROperation: if (LW) then begindst(6-0) ← (SP)dst(15-8) ← (SP+1)dst(23
5-133Z380™USER'S MANUALZILOGDC-8297-03POPPOP REGISTERPOP dst dst = R, RXOperation: if (LW) then begindst(7-0 ) ← (SP)dst(15-8) ← (SP+1)dst(23-16)
5-134Z380™USER'S MANUALDC-8297-03ZILOGPUSHPUSH ACCUMULATORPUSH src src = AFOperation: if (LW) then beginSP ← SP - 4(SP) ← F(SP+1) ← A(SP+2) ← 00h
5-135Z380™USER'S MANUALZILOGDC-8297-03PUSHPUSH CONTROL REGISTERPUSH src src = SROperation: if (LW) then beginSP ← SP - 4(SP) ← src(7-0)(SP+1) ← s
2-2Z380™USER'S MANUALDC-8297-03ZILOG2.2 CPU REGISTER SPACE (Continued)AFBCDEHLIXU IXLIYU IYLA' F'B' C'D' E'H'
5-136Z380™USER'S MANUALDC-8297-03ZILOGPUSHPUSH IMMEDIATEPUSH src src = IMOperation: if (LW) then beginSP ← SP - 4(SP) ← src(7-0)(SP+1) ← src(15-8
5-137Z380™USER'S MANUALZILOGDC-8297-03PUSHPUSH REGISTERPUSH src src = R, RXOperation: if (LW) then beginSP ← SP - 4(SP) ← src(7-0)(SP+1) ← src(15
5-138Z380™USER'S MANUALDC-8297-03ZILOGRESRESET BITRES b, dst dst = R, IR, XOperation: dst(b) ← 0The specified bit b within the destination operan
5-139Z380™USER'S MANUALZILOGDC-8297-03RESCRESET CONTROL BITRESC mode mode = LCK, LWOperation: if (mode = LCK) then beginSR(1) ← 0endelse beginSR(
5-140Z380™USER'S MANUALDC-8297-03ZILOGRETRETURNRET [cc]Operation: if (cc is TRUE) then beginif (XM) then beginPC(7-0) ← (SP)PC(15-8) ← (SP+1)PC(2
5-141Z380™USER'S MANUALZILOGDC-8297-03RETBRETURN FROM BREAKPOINTOperation: PC (31-0) ← SPC (31-0)This instruction is used to return to a previous
5-142Z380™USER'S MANUALDC-8297-03ZILOGRETIRETURN FROM INTERRUPTRETIOperation: if (XM) then beginPC(7-0) ← (SP)PC(15-8) ← (SP+1)PC(23-16) ← (SP+2)
5-143Z380™USER'S MANUALZILOGDC-8297-03RETNRETURN FROM NONMASKABLE INTERRUPTRETNOperation: if (XM) then beginPC(7-0) ← (SP)PC(15-8) ← (SP+1)PC(23-
5-144Z380™USER'S MANUALDC-8297-03ZILOGRLROTATE LEFT (BYTE)RL dst dst = R, IR, XOperation: tmp ← dstdst(0) ← CC ← dst(7)dst(n+1) ← tmp(n) for n =
5-145Z380™USER'S MANUALZILOGDC-8297-03RLWROTATE LEFT (WORD)RLW dst dst = R, RX, IR, XOperation: tmp ← dstdst(0) ← CC ← dst(15)dst(n+1) ← tmp(n) f
2-3Z380™USER'S MANUALZILOGDC-8297-032.2.1 Primary and Working RegistersThe working register set is divided into two register files:the primary fi
5-146Z380™USER'S MANUALDC-8297-03ZILOGRLAROTATE LEFT (ACCUMULATOR)RLAOperation: tmp ← AA(0) ← CC ← A(7)A(n+1) ← tmp(n) for n = 0 to 6The contents
5-147Z380™USER'S MANUALZILOGDC-8297-03RLCROTATE LEFT CIRCULAR (BYTE)RLC dst dst = R, IR, XOperation: tmp ← dstC ← dst(7)dst(0) ← tmp(7)dst(n+1) ←
5-148Z380™USER'S MANUALDC-8297-03ZILOGRLCWROTATE LEFT CIRCULAR (WORD)RLCW dst dst = R, RX, IR, XOperation: tmp ← dstC ← dst(15)dst(0) ← tmp(15)ds
5-149Z380™USER'S MANUALZILOGDC-8297-03RLCAROTATE LEFT CIRCULAR (ACCUMULATOR)RLCAOperation: tmp ← AC ← A(7)A(0) ← tmp(7)A(n+1) ← tmp(n) for n = 0
5-150Z380™USER'S MANUALDC-8297-03ZILOGRLDROTATE LEFT DIGITRLDOperation: tmp(3-0) ← A(3-0)A(3-0) ← dst(7-4)dst(7-4) ← dst(3-0)dst(3-0) ← tmp(3-0)T
5-151Z380™USER'S MANUALZILOGDC-8297-03RRROTATE RIGHT (BYTE)RR dst dst = R, IR, XOperation: tmp ← dstdst(7) ← CC ← dst(0)dst(n) ← tmp(n+1) for n =
5-152Z380™USER'S MANUALDC-8297-03ZILOGRRWROTATE RIGHT (WORD)RRW dst dst = R, RX, IR, XOperation: tmp ← dstC ← dst(0)dst(15) ← Cdst(n) ← tmp(n+1)
5-153Z380™USER'S MANUALZILOGDC-8297-03RRAROTATE RIGHT (ACCUMULATOR)RRAOperation: tmp ← AA(7) ← CC ← A(0)A(n) ← tmp(n+1) for n = 0 to 6The content
5-154Z380™USER'S MANUALDC-8297-03ZILOGRRCROTATE RIGHT CIRCULAR (BYTE)RRC dst dst = R, IR, XOperation: tmp ← dstC ← dst(0)dst(7) ← tmp(0)dst(n) ←
5-155Z380™USER'S MANUALZILOGDC-8297-03RRCWROTATE RIGHT CIRCULAR (WORD)RRCW dst dst = R, RX, IR, XOperation: tmp ← dstC ← dst(0)dst(15) ← tmp(0)ds
2-4Z380™USER'S MANUALDC-8297-03ZILOG2.2.6 Stack Pointer (Continued)Increment/decrement of the Stack Pointer is affected bymodes of operation (Nat
5-156Z380™USER'S MANUALDC-8297-03ZILOGRRCAROTATE RIGHT CIRCULAR (ACCUMULATOR)RRCAOperation: tmp ← AC ← A(0)A(7) ← tmp(0)A(n) ← tmp(n+1) for n = 0
5-157Z380™USER'S MANUALZILOGDC-8297-03RRDROTATE RIGHT DIGITRRDOperation: tmp(3-0) ← A(3-0)A(3-0) ← dst(3-0)dst(3-0) ← dst(7-4)dst(7-4) ← tmp(3-0)
5-158Z380™USER'S MANUALDC-8297-03ZILOGRSTRESTARTRST addressOperation: if (XM) then beginSP ← SP - 4(SP) ← PC(7-0)(SP+1) ← PC(15-8)(SP+2) ← PC(23-
5-159Z380™USER'S MANUALZILOGDC-8297-03SBCSUBTRACT WITH CARRY (BYTE)SBC A,src src = R, RX, IM, IR, XOperation: A ← A - src - CThe source operand t
5-160Z380™USER'S MANUALDC-8297-03ZILOGSBCSUBTRACT WITH CARRY (WORD)SBC HL,src dst = HLsrc = BC, DE, HL, SPOperation: HL(15-0) ← HL(15-0) - src(15
5-161Z380™USER'S MANUALZILOGDC-8297-03SBCWSUBTRACT WITH CARRY (WORD)SBCW [HL,]src src = R, RX, IM, XOperation: HL(15-0) ← HL(15-0) - src(15-0) -
5-162Z380™USER'S MANUALDC-8297-03ZILOGSCFSET CARRY FLAGSCFOperation: C ← 1The Carry flag is set to 1.Flags: S: UnaffectedZ: UnaffectedH: ClearedV
5-163Z380™USER'S MANUALZILOGDC-8297-03SETSET BITSET b, dst dst = R, IR, XOperation: dst(b) ← 1The specified bit b within the destination operand
5-164Z380™USER'S MANUALDC-8297-03ZILOGSETCSET CONTROL BITSETC mode mode = LCK, LW, XMOperation: if (mode = LCK) then beginSR(1) ← 1endelse if (mo
5-165Z380™USER'S MANUALZILOGDC-8297-03SLASHIFT LEFT ARITHMETIC (BYTE)SLA dst dst = R, IR, XOperation: tmp ← dstC ← dst(7)dst(0) ← 0dst(n+1) ← tmp
ZILOGDC-8297-03Appendix AAppendix A covers the Z380’s instruction format.Appendix BAppendix B contains all Z380 instructions sorted in AlphabeticalOrd
2-5Z380™USER'S MANUALZILOGDC-8297-0376543210Bits within a byte:16-bit word at address n:Least Significant ByteMost Significant ByteAddress nAddre
5-166Z380™USER'S MANUALDC-8297-03ZILOGSLAWSHIFT LEFT ARITHMETIC (WORD)SLAW dst dst = R, RX, IR, XOperation: tmp ← dstdst(0) ← 0C ← dst(15)dst(n+1
5-167Z380™USER'S MANUALZILOGDC-8297-03SLPSLEEPSLPOperation: if (STBY not enabled) thenCPU HaltselseZ380 enters Standby modeWith Standby mode disa
5-168Z380™USER'S MANUALDC-8297-03ZILOGSRASHIFT RIGHT ARITHMETIC (BYTE)SRA dst dst = R, IR, XOperation: tmp ← dstC ← dst(0)dst(7) ← tmp(7)dst(n) ←
5-169Z380™USER'S MANUALZILOGDC-8297-03SRAWSHIFT RIGHT ARITHMETIC (WORD)SRAW dst dst = R, RX, IR, XOperation: tmp ← dstC ← dst(0)dst(15) ← tmp(15)
5-170Z380™USER'S MANUALDC-8297-03ZILOGSRLSHIFT RIGHT LOGICAL (BYTE)SRL dst dst = R, IR, XOperation: tmp ← dstC ← dst(0)dst(7) ← 0dst(n) ← tmp(n+1
5-171Z380™USER'S MANUALZILOGDC-8297-03SRLWSHIFT RIGHT LOGICAL (WORD)SRLW dst dst = R, RX, IR, XOperation: tmp ← dstC ← dst(0)dst(15) ← 0dst(n) ←
5-172Z380™USER'S MANUALDC-8297-03ZILOGSUBSUBTRACT (BYTE)SUB A,src src = R, RX, IM, IR, XOperation: A ← A - srcThe source operand is subtracted fr
5-173Z380™USER'S MANUALZILOGDC-8297-03SUBSUBTRACT (WORD)SUB HL,src src = DAOperation: if (XM) then beginHL(31-0) ← HL(31-0) - src(31-0)endelse be
5-174Z380™USER'S MANUALDC-8297-03ZILOGSUBSUBTRACT FROM STACK POINTER (WORD)SUB SP,src src = IMOperation: if (XM) then beginSP(31-0) ← SP(31-0) –
5-175Z380™USER'S MANUALZILOGDC-8297-03SUBWSUBTRACT (WORD)SUBW [HL,]src src = R, RX, IM, XOperation: HL(15-0) ← HL(15-0) - src(15-0)The source ope
2-6Z380™USER'S MANUALDC-8297-03ZILOG2.5. EXTERNAL I/O ADDRESS SPACEExternal I/O address space is 4 Gbytes in size and ExternalI/O addresses are g
5-176Z380™USER'S MANUALDC-8297-03ZILOGSWAPSWAP UPPER REGISTER WORD WITH LOWER REGISTER WORDSWAP src src = R, RXOperation: src(31-16) ↔ src(15-0)T
5-177Z380™USER'S MANUALZILOGDC-8297-03TSTTEST (BYTE)TST src src = R, IM, IROperation: A AND srcA logical AND operation is performed between the c
5-178Z380™USER'S MANUALDC-8297-03ZILOGTSTIOTEST I/O PORTTSTIO src src = IMOperation: (C) AND srcA logical AND operation is performed between the
5-179Z380™USER'S MANUALZILOGDC-8297-03XOREXCLUSIVE OR (BYTE)XOR [A,]src src = R, RX, IM, IR, XOperation: A ← A XOR srcA logical EXCLUSIVE OR oper
5-180Z380™USER'S MANUALDC-8297-03ZILOGXORWEXCLUSIVE OR (WORD)XORW [HL,]src src = R, RX, IM, XOperation: HL(15-0) ← HL(15-0) XOR src(15-0)A logica
6-1Z380™USER'S MANUALZILOGDC-8297-036.1 INTRODUCTIONUSER’s MANUALCHAPTER 6INTERRUPTS AND TRAPSExceptions are conditions that can alter the normal
6-2Z380™USER'S MANUALDC-8297-03ZILOG6.2 INTERRUPTS (Continued)In an Interrupt acknowledge transaction, address outputsA31-A4 are driven to logic
6-3Z380™USER'S MANUALZILOGDC-8297-036.2.2.1 IEF1, IEF2IEF1 controls the overall enabling and disabling of all on-chip peripheral and external mas
6-4Z380™USER'S MANUALDC-8297-03ZILOG6.2.2.5 Trap and Break RegisterD7-D2 Reserved. Some of these bits are reserved fordevelopment support functio
6-5Z380™USER'S MANUALZILOGDC-8297-036.4 NONMASKABLE INTERRUPTThe Nonmaskable Interrupt Input /NMI is edge sensitive,with the Z380 MPU internally
2-7Z380™USER'S MANUALZILOGDC-8297-03Zilog’s products are not authorized for use as critical compo-nents in life support devices or systems unless
6-6Z380™USER'S MANUALDC-8297-03ZILOG6.5.4 Interrupt Mode 3 Response forMaskable Interrupt /INT0 (Continued)Native (one word) or Extended mode (tw
6-7Z380™USER'S MANUALZILOGDC-8297-03Zilog’s products are not authorized for use as critical compo-nents in life support devices or systems unless
USER'S MANUALZILOG7.1 INTRODUCTIONUSER’s MANUALCHAPTER 7RESETThe Z380 CPU is placed in a dormant state when the/RESET input is asserted. All its
USER'S MANUALZILOGTable 7-1. Effect of a Reset on Z380 CPU and Related I/O RegistersRegister Reset Value CommentsProgram Counter 00000000 PCz, P
USER'S MANUALZILOGZilog’s products are not authorized for use as critical compo-nents in life support devices or systems unless a specific writte
USER'S MANUALZILOGUSER’s MANUALAPPENDIX AZ380™ CPU INSTRUCTION FORMATSFour formats are used to generate the machine languagebit encoding for the
USER'S MANUALZILOGThe four instruction formats are shown in Tables A-1through A-4. Within each format, several different configu-rations
USER'S MANUALZILOGZilog’s products are not authorized for use as critical compo-nents in life support devices or systems unless a specific writte
USER'S MANUALZILOGUSER’s MANUALAPPENDIX BZ380™ INSTRUCTIONS INALPHABETIC ORDERThis Appendix contains a quick reference guide for pro-gramming. It
USER'S MANUALZILOGSource Code Mode Object CodeADC A,(HL) 8EADC A,(IX+12H) I DD 8E 12ADC A,(IY+12H) I FD 8E 12ADC A,A 8FADC A,B 88ADC A,C 89ADC A,
3-1Z380™USER'S MANUALZILOGDC-8297-033.1 INTRODUCTIONUSER’s MANUALCHAPTER 3NATIVE EXTENDED MODE, WORD/LONGWORD MODE OF OPERATIONSAND DECODER DIREC
USER'S MANUALZILOGSource Code Mode Object CodeAND IYU FD A4AND L A5ANDW (IX+12H) I DD E6 12ANDW (IY+12H) I FD E6 12ANDW 1234H ED A6 34 12ANDW BC
USER'S MANUALZILOGSource Code Mode Object CodeCALL NV, 1234H I X E4 34 12CALL Z,1234H I X CC 34 12CALR 123456H X FD CD 56 34 12CALR 1234H X DD CD
USER'S MANUALZILOGSource Code Mode Object CodeDEC IY X FD 2BDEC IYL FD 2DDEC IYU FD 25DEC L 2DDEC SP X 3BDECW BC X 0BDECW DE X 1BDECW HL X 2BDECW
USER'S MANUALZILOGSource Code Mode Object CodeINC B 04INC BC X 03INC C 0CINC D 14INC DE X 13INC E 1CINC H 24INC HL X 23INC IX X DD 23INC IXL DD 2
USER'S MANUALZILOGSource Code Mode Object CodeLD (IX+12H),IY I L DD CB 12 2BLD (IX+12H),L I DD 75 12LD (IY+12H),34H I FD 36 34 12LD (IY+12H),A I
USER'S MANUALZILOGSource Code Mode Object CodeLD DE,IX L DD 1BLD DE,IY L FD 1BLD E,(HL) 5ELD E,(IX+12H) I DD 5E 12LD E,(IY+12H) I FD 5E 12LD E,12
USER'S MANUALZILOGSource Code Mode Object CodeLD L,H 6CLD L,L 6DLD R,A ED 4FLD SP,(1234H) I L ED 7B 34 12LD SP,1234H I L 31 34 12LD SP,HL L F
USER'S MANUALZILOGSource Code Mode Object CodeORW DE ED B5ORW HL ED B7ORW HL,(IX+12H) I DD F6 12ORW HL,(IY+12H) I FD F6 12ORW HL,1234H ED B6
USER'S MANUALZILOGSource Code Mode Object CodeRES 4,E CB A3RES 4,H CB A4RES 4,L CB A5RES 5,(HL) CB AERES 5,(IX+12H) I DD CB 12 AERES 5,(IY+12H) I
USER'S MANUALZILOGSource Code Mode Object CodeRRC H CB 0CRRC L CB 0DRRCA 0FRRCW (HL) ED CB 0ARRCW (IX+12H) I DD CB 12 0ARRCW (IY+12H) I FD CB 12
3-2Z380™USER'S MANUALDC-8297-03ZILOG3.2 DECODER DIRECTIVESThe Decoder Directive is not an instruction, but rather adirective to the instruction
USER'S MANUALZILOGSource Code Mode Object CodeSET 4,B CB E0SET 4,C CB E1SET 4,D CB E2SET 4,E CB E3SET 4,H CB E4SET 4,L CB E5SET 5,(HL) CB EESET 5
USER'S MANUALZILOGSource Code Mode Object CodeSUB A,IYU FD 94SUB A,L 95 SUBHL,(1234H) I X ED D6 34 12SUB SP,1234H I X ED 92 34 12SUBW (IX+12H) DD
USER'S MANUALZILOGZilog’s products are not authorized for use as critical compo-nents in life support devices or systems unless a specific writte
USER'S MANUALZILOGUSER’s MANUALAPPENDIX CZ380™ INSTRUCTION IN NUMERIC ORDERThe following Appendix has the Z380 instructions sortedby numeric orde
USER'S MANUALZILOGObject Code Source Code Mode00 NOP01 34 12 LD BC,1234H I L02 LD (BC),A03 INC BC X03 INCW BC X04 INC B05 DEC B06 12 LD B,12H07 R
USER'S MANUALZILOGObject Code Source Code Mode63 LD H,E64 LD H,H65 LD H,L66 LD H,(HL)67 LD H,A68 LD L,B69 LD L,C6A LD L,D6B LD L,E6C LD L,H6D LD
USER'S MANUALZILOGObject Code Source Code ModeB7 OR A,AB8 CP A,BB8 CP BB9 CP A,CB9 CP CBA CP A,DBA CP DBB CP A,EBB CP EBC CP A,HBC CP HBD CP A,LB
USER'S MANUALZILOGObject Code Source Code ModeCB 51 BIT 2,CCB 52 BIT 2,DCB 53 BIT 2,ECB 54 BIT 2,HCB 55 BIT 2,LCB 56 BIT 2,(HL)CB 57 BIT 2,ACB 58
USER'S MANUALZILOGObject Code Source Code ModeCB BD RES 7,LCB BE RES 7,(HL)CB BF RES 7,ACB C0 SET 0,BCB C1 SET 0,CCB C2 SET 0,DCB C3 SET 0,ECB C4
USER'S MANUALZILOGObject Code Source Code ModeDD 23 INC IX XDD 23 INCW IX XDD 24 INC IXUDD 25 DEC IXUDD 26 12 LD IXU,12HDD 27 LD IX,IY LDD 28 34
3-3Z380™USER'S MANUALZILOGDC-8297-03The Z380 CPU implements one instruction to switch toExtended mode from Native mode; SETC XM (set Ex-tended mo
USER'S MANUALZILOGObject Code Source Code ModeDD AC XOR IXUDD AD XOR A,IXLDD AD XOR IXLDD AE 12 XOR (IX+12H) IDD AE 12 XOR A,(IX+12H) IDD AF XORW
USER'S MANUALZILOGObject Code Source Code ModeDD E3 EX (SP),IX LDD E4 34 12 CALR PO,1234H XDD E5 PUSH IX LDD E6 12 ANDW (IX+12H) IDD E6 12 ANDW H
USER'S MANUALZILOGObject Code Source Code ModeED 52 SBC HL,DEED 53 34 12 LD (1234H),DE I LED 54 NEGW HLED 54 NEGWED 55 reservedED 56 IM 1ED 57 LD
USER'S MANUALZILOGObject Code Source Code ModeED B5 ORW DEED B5 ORW HL,DEED B6 34 12 ORW 1234HED B6 34 12 ORW HL,1234HED B7 ORW HLED B7 ORW HL,HL
USER'S MANUALZILOGObject Code Source Code ModeED CB BC DIVUW HL,IXED CB BC DIVUW IXED CB BD DIVUW HL,IYED CB BD DIVUW IYED CB BF DIVUW 1234HED CB
USER'S MANUALZILOGObject Code Source Code ModeFD 3F LD (HL),HL LFD 44 LD B,IYUFD 45 LD B,IYLFD 46 12 LD B,(IY+12H) IFD 4C LD C,IYUFD 4D LD C,IYLF
USER'S MANUALZILOGObject Code Source Code ModeFD CB 12 1A RRW (IY+12H) IFD CB 12 1B LD (IY+12H),DE IFD CB 12 1E RR (IY+12H) IFD CB 12 21 LD IY,(S
USER'S MANUALZILOGZilog’s products are not authorized for use as critical compo-nents in life support devices or systems unless a specific writte
USER'S MANUALZILOGUSER’s MANUALThis Appendix has two sets of tables. Each table is asubset of the Table in the Appendix B. The Table D-1 hasthe i
USER'S MANUALZILOGTable D-1. Instructions operating differently inNative or Extended mode of operation.Source Code Object CodeADD HL,BC 09ADD HL
4-1Z380™USER'S MANUALZILOGDC-8297-034.1 INSTRUCTIONUSER’s MANUALCHAPTER 4ADDRESSING MODES AND DATA TYPESAn instruction is a consecutive list of o
USER'S MANUALZILOGSource Code Object CodeRETN ED 45RST 00H C7RST 08H CFRST 10H D7RST 18H DFRST 20H E7RST 28H EFRST 30H F7RST 38H FFTable D-2. In
USER'S MANUALZILOGSource Code Object CodeLDCTL HL,SR ED C0LDCTL SR,HL ED C8LDDRW ED F8LDDW ED E8LDIRW ED F0LDIW ED E0LDW HL,I DD 57LDW I,HL DD 47
USER'S MANUALZILOGUSER’s MANUALAPPENDIX EINSTRUCTIONS AFFECTED BYDDIR IM INSTRUCTIONSThis Appendix has instructions which can be used with theDec
USER'S MANUALZILOGTable E-3. Valid with DDIR IB in Long Word mode.XM bit status does not affect the operation. (Eitherwith DDIR IB,LW or DDIR IB
USER'S MANUALZILOGOR (IY+1234H) FD B6 34 12OR A,(IX+1234H) DD B6 34 12OR A,(IY+1234H) FD B6 34 12ORW (IX+1234H) DD F6 34 12ORW (IY+1234H) FD F6 3
USER'S MANUALZILOGTable E-5. Valid with DDIR IW in Exteded mode. LWbit status does not affect the operationADD HL,(12345678H) ED C6 78 56 34 12A
USER'S MANUALZILOGTable E-7. Valid with DDIR IW in Long Word mode.XM bit status does not affect the operation. (Eitherwith DDIR IW,LW or DDIR IW
USER'S MANUALZILOGSET 4,(IY+123456H) FD CB56 34 12 E6SET 5,(IX+123456H) DD CB56 34 12 EESET 5,(IY+123456H) FD CB56 34 12 EESET 6,(IX+123456H) DD
USER'S MANUALZILOGZilog’s products are not authorized for use as critical compo-nents in life support devices or systems unless a specific writte
4-2Z380™USER'S MANUALDC-8297-03ZILOG4.2.2 Immediate (IM) (Continued)InstructionOPERATIONOPERANDThe operand value is in the instructionImmediate
4-3Z380™USER'S MANUALZILOGDC-8297-034.2.4 Direct Address (DA)When Direct Address mode is used, the data processed isat the location whose memory
4-4Z380™USER'S MANUALDC-8297-03ZILOG4.2.5 Indexed (X)When the Indexed addressing mode is used, the dataprocessed is at the location whose address
USER'S MANUALZILOG1.1 INTRODUCTIONUSER’s MANUALCHAPTER 1Z380™ ARCHITECTURAL OVERVIEWThe Z380 CPU incorporates advanced architectural fea-tures th
4-5Z380™USER'S MANUALZILOGDC-8297-032. Load accumulator from location (IX-1) in Extended modeSETC XM ;Set Extended modeLD A, (IX-1) ;Load into th
4-6Z380™USER'S MANUALDC-8297-03ZILOG4.2.6 Program Counter Relative Mode (RA) (Continued)PCz PCBefore instruction execution 0000 1000After instruc
4-7Z380™USER'S MANUALZILOGDC-8297-034.2.7 Stack Pointer Relative Mode (SR)For Stack Pointer Relative addressing mode, the dataprocessed is at the
4-8Z380™USER'S MANUALDC-8297-03ZILOG4.2.7 Stack Pointer Relative Mode (SR) (Continued)2. Load HL from location (SP – 4) in Extended mode, Long Wo
4-9Z380™USER'S MANUALZILOGDC-8297-034.3 DATA TYPESThe Z380 CPU can operate on bits, binary-coded decimal(BCD) digits (four bits), bytes (eight bi
5-1Z380™USER'S MANUALZILOGDC-8297-035.1 INTRODUCTIONUSER’s MANUALCHAPTER 5INSTRUCTION SETThe Z380™ CPU instruction set is a superset of the Z80 C
5-2Z380™USER'S MANUALDC-8297-03ZILOG5.2.1 Carry Flag (C)The Carry flag is set or cleared depending on the operationbeing performed. For add instr
5-3Z380™USER'S MANUALZILOGDC-8297-035.2.7 Condition CodesThe Carry, Zero, Sign, and Parity/Overflow flags are usedto control the operation of the
5-4Z380™USER'S MANUALDC-8297-03ZILOG5.3 SELECT REGISTERThe Select Register (SR) controls the register set selectionand the operating modes of the
5-5Z380™USER'S MANUALZILOGDC-8297-035.3.8. Long Word Mode (LW)This bit controls the Long Word/Word mode selection forthe Z380 CPU. This bit is se
1-2Z380™USER'S MANUALDC-8297-03ZILOG1.1 INTRODUCTION (Continued)AFBCDEHLIXU IXLIYU IYLA' F'B' C'D' E'H' L&apos
5-6Z380™USER'S MANUALDC-8297-03ZILOG5.5 INSTRUCTION SET FUNCTIONAL GROUPSAn Exchange instruction is available for swapping thecontents of the ac
5-7Z380™USER'S MANUALZILOGDC-8297-035.5.2 16-Bit and 32-Bit Load, Exchange,SWAP, and PUSH/POP GroupThis group of load, exchange, and PUSH/POP ins
5-8Z380™USER'S MANUALDC-8297-03ZILOG5.5.2 16-Bit and 32-Bit Load, Exchange,SWAP and PUSH/POP Group (Continued)Table 5-6. Supported Source and De
5-9Z380™USER'S MANUALZILOGDC-8297-03has to be an even number (D0 = 0) in Word mode transfer,and a multiple of four in Long Word mode (D1 and D0 a
5-10Z380™USER'S MANUALDC-8297-03ZILOG5.5.5 16-Bit Arithmetic OperationThis group of instructions (Table 5-10) provide 16-bitarithmetic instructio
5-11Z380™USER'S MANUALZILOGDC-8297-035.5.6 8-Bit Manipulation, Rotate and ShiftGroupInstructions in this group (Table 5-11) test, set, and resetb
5-12Z380™USER'S MANUALDC-8297-03ZILOG5.5.8 Program Control GroupThis group of instructions (Table 5-13) affect the ProgramCounter (PC) and thereb
5-13Z380™USER'S MANUALZILOGDC-8297-035.5.9 External Input/Output InstructionGroupThis group of instructions (Table 5-14) are used for trans-ferri
5-14Z380™USER'S MANUALDC-8297-03ZILOG5.5.9 External Input/Output Instruction Group (Continued)Table 5-14. External I/O Group Instructions.Instru
5-15Z380™USER'S MANUALZILOGDC-8297-035.5.10 Internal I/O Instruction GroupThis group (Table 5-15) of instructions is used to accesson-chip I/O ad
1-3Z380™USER'S MANUALZILOGDC-8297-031.2 CPU ARCHITECTUREThe Z380 CPU is a binary-compatible extension of the Z80CPU and the Z180 CPU architecture
5-16Z380™USER'S MANUALDC-8297-03ZILOG5.5.11 CPU Control GroupThe instructions in this group (Table 5-16) act upon theCPU control and status regis
5-17Z380™USER'S MANUALZILOGDC-8297-035.5.12 Decoder DirectivesThe Decoder Directives (Table 5-17) are a special instruc-tions to expand the Z80 i
5-18Z380™USER'S MANUALDC-8297-03ZILOG5.6 NOTATION AND BINARY ENCODING (Continued)Condition Codes. The following symbols describe thecondition co
5-19Z380™USER'S MANUALZILOGDC-8297-03Table 5-18. Execution TimeOperation Byte Word Word Long Long Long Long LongSequence B W B/B W/W W/B/B B/W/B
5-20Z380™USER'S MANUALDC-8297-03ZILOGADCADD WITH CARRY (BYTE)ADC A,src src = R, RX, IM, IR, XOperation: A ← A + src + CThe source operand togethe
5-21Z380™USER'S MANUALZILOGDC-8297-03ADCADD WITH CARRY (WORD)ADC HL,src dst = HLsrc = BC, DE, HL, SPOperation: HL(15-0) ← HL(15-0) + src(15-0) +
5-22Z380™USER'S MANUALDC-8297-03ZILOGADCWADD WITH CARRY (WORD)ADCW [HL,]src src = R, RX, IM, XOperation: HL(15-0) ← HL(15-0) + src(15-0) + CThe s
5-23Z380™USER'S MANUALZILOGDC-8297-03ADDADD (BYTE)ADD A,src src = R, RX, IM, IR, XOperation: A ← A + srcThe source operand is added to the accumu
5-24Z380™USER'S MANUALDC-8297-03ZILOGADDADD (WORD)ADD dst,src dst = HL; src = BC, DE, HL, SP, DAordst = IX; src = BC, DE, IX, SPordst = IY; src =
5-25Z380™USER'S MANUALZILOGDC-8297-03ADDADD TO STACK POINTER (WORD)ADD SP,srcsrc = IMOperation: if (XM) then beginSP(31-0) ← SP(31-0) + src(31-0)
1-4Z380™USER'S MANUALDC-8297-03ZILOG1.2.2 Address Spaces (Continued)Each register set includes the primary registers A, F, B, C,D, E, H, L, IX,
5-26Z380™USER'S MANUALDC-8297-03ZILOGADDWADD (WORD)ADDW [HL,]src src = R, RX, IM, XOperation: HL(15-0) ← HL(15-0) + src(15-0)The source operand i
5-27Z380™USER'S MANUALZILOGDC-8297-03ANDAND (BYTE)AND [A,]src src = R, RX, IM, IR, XOperation: A ← A AND srcA logical AND operation is performed
5-28Z380™USER'S MANUALDC-8297-03ZILOGANDWAND (WORD)ANDW [HL,]src src = R, RX, IM, XOperation: HL(15-0) ← HL(15-0) AND src(15-0)A logical AND oper
5-29Z380™USER'S MANUALZILOGDC-8297-03BITBIT TESTBIT b,dst dst = R, IR, XOperation: Z ← NOT dst(b)The specified bit b within the destination opera
5-30Z380™USER'S MANUALDC-8297-03ZILOGBTESTBANK TESTBTESTOperation: S ← SR(16)Z ← SR(24)V ← SR(0)C ← SR(8)The Alternate Register bits in the Selec
5-31Z380™USER'S MANUALZILOGDC-8297-03CALLCALLCALL [cc,]dst dst = DAOperation: if (cc is TRUE) then beginif (XM) then beginSP ← SP - 4(SP) ← PC(7-
5-32Z380™USER'S MANUALDC-8297-03ZILOGCALRCALL RELATIVECALR [cc,]dst dst = RAOperation: if (cc is true) then begindst ← SIGN EXTEND dstif (XM) the
5-33Z380™USER'S MANUALZILOGDC-8297-03CCFCOMPLEMENT CARRY FLAGCCFOperation: C ← NOT CThe Carry flag is inverted.Flags: S: UnaffectedZ: UnaffectedH
5-34Z380™USER'S MANUALDC-8297-03ZILOGCPCOMPARE (BYTE)CP [A,]src src = R, RX, IM, IR, XOperation: A – srcThe source operand is compared with the
5-35Z380™USER'S MANUALZILOGDC-8297-03CPWCOMPARE (WORD)CPW [HL,]src src = R, RX, IM, XOperation: HL(15-0) – src(15-0)The source operand is compare
1-5Z380™USER'S MANUALZILOGDC-8297-03are handled by a newly added interrupt handing mode,“Assigned Vectored Mode,” which is a fixed vectoredinterr
5-36Z380™USER'S MANUALDC-8297-03ZILOGCPDCOMPARE AND DECREMENT (BYTE)CPDOperation: A - (HL)if (XM) then beginHL(31-0) ← HL(31-0) - 1endelse beginH
5-37Z380™USER'S MANUALZILOGDC-8297-03CPDRCOMPARE, DECREMENT AND REPEAT (BYTE)CPDROperation: Repeat until (BC=0 OR match) beginA - (HL)if (XM) the
5-38Z380™USER'S MANUALDC-8297-03ZILOGCPICOMPARE AND INCREMENT (BYTE)CPIOperation: A - (HL)if (XM) then beginHL(31-0) ← HL(31-0) + 1endelse beginH
5-39Z380™USER'S MANUALZILOGDC-8297-03CPIRCOMPARE, INCREMENT AND REPEAT (BYTE)CPIROperation: Repeat until (BC=0 OR match) beginA - (HL)if (XM) the
5-40Z380™USER'S MANUALDC-8297-03ZILOGCPLCOMPLEMENT ACCUMULATORCPL [A]Operation: A ← NOT AThe contents of the accumulator are complemented (one&ap
5-41Z380™USER'S MANUALZILOGDC-8297-03CPLWCOMPLEMENT HL REGISTER (WORD)CPLW [HL]Operation: HL(15-0) ← NOT HL(15-0)The contents of the HL register
5-42Z380™USER'S MANUALDC-8297-03ZILOGDAADECIMAL ADJUST ACCUMULATORDAAOperation: A ← Decimal Adjust AThe accumulator is adjusted to form two 4-bit
5-43Z380™USER'S MANUALZILOGDC-8297-03DDIRDECODER DIRECTIVEDDIR modemode = W or LW, IB or IWOperation: None, decoder directive onlyThis is not an
5-44Z380™USER'S MANUALDC-8297-03ZILOGDECDECREMENT (BYTE)DEC dst dst = R, RX, IR, XOperation: dst ← dst – 1The destination operand is decremented
5-45Z380™USER'S MANUALZILOGDC-8297-03DEC[W]DECREMENT (WORD)DEC[W] dstdst = R, RXOperation: if (XM) then begindst(31-0) ← dst(31-0) - 1endelse beg
1-6Z380™USER'S MANUALDC-8297-03ZILOG1.3.3. Enhanced Instruction Set with 16-Bitand 32-Bit Manipulation Capability(Continued) DDIR (Decoder Direc
5-46Z380™USER'S MANUALDC-8297-03ZILOGDIDISABLE INTERRUPTSDI [n]Operation: if (n is present) then beginfor i=1 to 4 beginif (n(i) = 1) then beginI
5-47Z380™USER'S MANUALZILOGDC-8297-03DIVUWDIVIDE UNSIGNED (WORD)DIVUW [HL,]src src = R, RX, IM, XOperation: HL(15-0) ← HL / srcHL(31-16) ← remain
5-48Z380™USER'S MANUALDC-8297-03ZILOGDJNZDECREMENT AND JUMP IF NON-ZERODJNZ dst dst = RAOperation: B ← B-1If (B <> 0) then begindst ← SIGN
5-49Z380™USER'S MANUALZILOGDC-8297-03EIENABLE INTERRUPTSEI [n]Operation: if (n is present) then beginfor i=1 to 4 beginif (n(i) = 1) then beginIE
5-50Z380™USER'S MANUALDC-8297-03ZILOGEXEXCHANGE ACCUMULATOR/FLAG WITH ALTERNATE BANKEX AF,AF’Operation: SR(0) ← NOT SR(0)Bit 0 of the Select Regi
5-51Z380™USER'S MANUALZILOGDC-8297-03EXEXCHANGE ADDRESSING REGISTER WITH TOP OF STACKEX (SP),dst dst = HL, IX, IYOperation: if (LW) then begin(SP
5-52Z380™USER'S MANUALDC-8297-03ZILOGEXEXCHANGE REGISTER (WORD)EX dst,src dst = R, RXsrc = R, RXOperation: if (LW) then begindst(31-0) ↔ src(31-0
5-53Z380™USER'S MANUALZILOGDC-8297-03EXEXCHANGE REGISTER WITH ALTERNATE REGISTER (BYTE)EX dst,src src = ROperation: dst ↔ srcThe contents of the
5-54Z380™USER'S MANUALDC-8297-03ZILOGEXEXCHANGE REGISTER WITH ALTERNATE REGISTER (WORD)EX dst,src src = R, RXOperation: if (LW) then begindst(31-
5-55Z380™USER'S MANUALZILOGDC-8297-03EXEXCHANGE WITH ACCUMULATOREX A,src src = R, IROperation: dst ↔ srcThe contents of the accumulator are excha
2-1Z380™USER'S MANUALZILOGDC-8297-032.1 INTRODUCTIONUSER’s MANUALCHAPTER 2ADDRESS SPACESThe Z380 CPU supports five address spaces correspond-ing
5-56Z380™USER'S MANUALDC-8297-03ZILOGEXALLEXCHANGE ALL REGISTERS WITH ALTERNATE BANKEXALLOperation: SR(24) ← NOT SR(24)SR(16) ← NOT SR(16)SR(8) ←
5-57Z380™USER'S MANUALZILOGDC-8297-03EXTSEXTEND SIGN (BYTE)EXTS [A]Operation: L ← Aif (A(7)=0) then beginH ¨ 00hif (LW) then beginHL(31-16) ← 000
5-58Z380™USER'S MANUALDC-8297-03ZILOGEXTSWEXTEND SIGN (WORD)EXTSW [HL]Operation: If (HL(15)=0) then beginHL(31-16) ← 0000hendelse beginHL(31-16)
5-59Z380™USER'S MANUALZILOGDC-8297-03EXXEXCHANGE REGISTERS WITH ALTERNATE BANKEXXOperation: SR(8) ← NOT SR(8)Bit 8 of the Select Register (SR), w
5-60Z380™USER'S MANUALDC-8297-03ZILOGEXXXEXCHANGE IX REGISTER WITH ALTERNATE BANKEXXXOperation: SR(16) ← NOT SR(16)Bit 16 of the Select Register
5-61Z380™USER'S MANUALZILOGDC-8297-03EXXYEXCHANGE IY REGISTER WITH ALTERNATE BANKEXXYOperation: SR(24) ← NOT SR(24)Bit 24 of the Select Register
5-62Z380™USER'S MANUALDC-8297-03ZILOGHALTHALTHALTOperation: CPU HaltsThe CPU operation is suspended until either an interrupt request or reset re
5-63Z380™USER'S MANUALZILOGDC-8297-03IMINTERRUPT MODE SELECTIM p p = 0, 1, 2, 3Operation: SR(4-3) ← pThe interrupt mode of operation is set to o
5-64Z380™USER'S MANUALDC-8297-03ZILOGININPUT (BYTE)IN dst,(C) dst = ROperation: dst ← (C)The byte of data from the selected peripheral is loaded
5-65Z380™USER'S MANUALZILOGDC-8297-03INWINPUT (WORD)INW dst,(C) dst = ROperation: dst(15-0) ← (C)The word of data from the selected peripheral is
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